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#1 bobdxcool  Icon User is offline

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counter program in MIPS CPU using quartus 2

Posted 27 October 2013 - 11:00 AM

Hi.

I have written a machine level code for a counter that should increment to 15 and then decrement to 10, once 15 is reached, and then reset to 0, once 10 is reached.

I have written this program in .mif files. I have used 2 .mif files, one for instruction memory and other for data memory.

I feel I have not written the jump instruction properly, as I'm not able to figure how to write the jump instruction.


This code below is the instruction memory code


--
-- Instruction Memory Initialization File
--
-- Instrucion Format:
--
-- R-Type: <6-bit Opcode>,<5-bit rs>,<5-bit rt>,<5-bit rd>,<5-bit shamt>,<6-bit funct>
--    bits   (31-26)       (25-21)     (20-16)    (15-11)     (10-6)       (5-0)
--
-- I-Type: <6-bit Opcode>,<5-bit rs>,<5-bit rt>,<16-bit Address> 
--   bits     (31-26)      (25-21)   (20-16)     (15-0)


--File format:
-- Hex Address 3 hex nibbles (12 bits) : bit31 ...... bit0;

WIDTH=32;
DEPTH=1024;

ADDRESS_RADIX=HEX;
DATA_RADIX=BIN;

CONTENT BEGIN
--Hex Address :   bit31..........................bit0;
--   |             |                              |
    000       :    10001100000000000000000000000000;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=0,   offset=0 
-- This is the first instruction that get's executed
-- in mips_ss CPU in DE0-Nano.
-- This is a lw instructioni. It loads r0 with data from
-- data memory location 0. Data memory location 0 is 
-- preloaded with 0 , see DRAM.mif.
--
    001       :    10001100000000010000000000000100;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=1,   offset=4 
-- This is a lw instructioni. It loads r1 with data from
-- data memory location 4. Data memory location 4 is 
-- preloaded with 0, see DRAM.mif.
--
    002       :    10001100000000100000000000001000;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=2,   offset=8 
-- This is a lw instructioni. It loads r2 with data from
-- data memory location 8. Data memory location 8 is 
-- preloaded with 1, see DRAM.mif.
    003       :    10001100000000110000000000001100;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=3,   offset=12 
-- This is a lw instructioni. It loads r3 with data from
-- data memory location 8. Data memory location 8 is 
-- preloaded with 10, see DRAM.mif.
    004       :    10001100000001000000000000010000;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=4,   offset=16 
-- This is a lw instructioni. It loads r4 with data from
-- data memory location 8. Data memory location 8 is 
-- preloaded with 15, see DRAM.mif.
--
    005       :    00010000100000000000000000000000;
--                 |____||___||___||______________|
--                   |     |    |         |             
--                  beq,rs=4,rt=0,  offset exit loop(addr:008)

    006       :    00000000010000000000000000100000;
--                 |____||___||___||___||___||____|
--                   |     |    |    |    |    |         
--                 R-type,rs=2,rt=0,rd=0,---,f=add 
-- Add instructions (r-type, opcode=0, funct=100000) 
-- add       => rd = rs + rt
-- Therefore => r0 = r2 + r0

    007       :    00001000000000000000000000000101;
--                 |____||________________________|
--                   |               |             
--                 jump, Target address:address(005) 
-- Decrementing to 10
    008       :    00010000011000000000000000000000;
--                 |____||___||___||______________|
--                   |     |    |         |             
--                  beq,rs=3,rt=0,  offset to exit loop(addr:00B)

    009       :    00000000010000010010100000100010;
--                 |____||___||___||___||___||____|
--                   |     |    |    |    |    |         
--                 R-type,rs=2,rt=1,rd=5,---,f=sub 
-- sub instructions (r-type, opcode=0, funct=100010) 
-- add       => rd = rs - rt
-- Therefore => r4 = r1 - r2
    00A       :    00001000000000000000000000001000;
--                 |____||________________________|
--                   |               |             
--                 jump, Target address:address(addr:008)
-- Reloading when r0 == 10
    00B       :    10001100000000000000000000000000;
--                 |____||___||___||______________|
--                   |     |    |          |
--                   lw, rs=0, rt=0,   offset=0 
-- This is a lw instructioni. It loads r0 with data from
-- data memory location 4. Data memory location 0 is 
-- preloaded with 0, see DRAM.mif.

    00C       :    00001000000000000000000000000101;
--                 |____||________________________|
--                   |               |             
--                 jump, Target address:address(addr:005)

END;








The next one below is the data memory mif file

-- Data Memory Initialization File
--

--File format:
-- Hex Address 3 hex nibbles (12 bits) : bit31 ...... bit0;

WIDTH=32;
DEPTH=1024;

ADDRESS_RADIX=HEX;
DATA_RADIX=BIN;

CONTENT BEGIN
    000       :    00000000000000000000000000000000;
    001       :    00000000000000000000000000000000;
-- 1
    002       :    00000000000000000000000000000001;
-- 10
    003       :    00000000000000000000000000001010;
-- 15
    004       :    00000000000000000000000000001111;
END;







The program is not working as intended. It increments by 10 and then decrements randomly.

Pls help. I think I have not written the Jump instruction format properly.

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Replies To: counter program in MIPS CPU using quartus 2

#2 turboscrew  Icon User is offline

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Re: counter program in MIPS CPU using quartus 2

Posted 29 October 2013 - 08:25 AM

From here:
offset 0 is a NOP (= branch to the next instruction).

Branch offset is 2's complement displacement. It says that the two LSBs are dropped. I understand that it means they are ignored (and assumed to be zero).

At 005: beq,rs=4,rt=0, offset exit loop(addr:008)

The offset should probably be 006 = 0, 007 = 4, 008 = 8

005 : 00010000100000000000000000001000;


Also, it says a bit differently about jumps. Here the address id given in 32-bit words - just as you did. The byte address is shifted down 2 bits.

At 007: jump, Target address:address(005)

007: : 00001000000000000000000000000101;

I'm not sure about this, but that's what I understood from the link.
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